1 qs5805t/at/bt guaranteed low skew cmos clock driver/buffer industrial temperature range july 2000 1999 integrated device technology, inc. dsc-5267 c qs5805t/at/bt advance information industrial temperature range guaranteed low skew cmos clock driver/buffer functional block diagram oe a in a in b oa 5 oa 1 5 5 mon ob 5 ob 1 oe b description the qs5805t clock buffer/driver circuits can be used for clock buffering schemes where low skew is a key parameter. this device offers two banks of five non-inverting outputs. this device provides low propagation delay buffering with on-chip skew of 0.7ns for same-transition, same-bank signals. the qs5805t is characterized for operation at -40c to +85c. features: - 10 output, low skew signal buffer - guaranteed low skew: 0.7ns output skew (same bank) 0.9ns output skew (different bank) 1ns part-to-part skew - input hysteresis for better noise margin - monitor output - undershoot clamp diodes on all inputs - std., a, and b speed grades - available in qsop and soic packages
2 industrial temperature range qs5805t/at/bt guaranteed low skew cmos clock driver/buffer pin configuration qsop/ soic top view 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 so20-2 so20-8 v cca oa 1 oa 2 oa 3 gnd a oa 4 oa 5 gndq oe a in a v ccb ob 1 ob 2 ob 3 gnd b ob 4 ob 5 mon oe b in b absolute maximum ratings (1) symbol description max. unit v term (2) supply voltage to ground C 0.5 to +7 v dc output voltage v out C 0.5 to +7 v v term (3) dc input voltage v in C 0.5 to +7 v v ac ac input voltage (pulse width 20ns) -3 v i out dc input diode current v in < 0 -20 ma dc output current max. sink current/pin 120 ma t stg storage temperature C 65 to +150 c t j junction temperature 150 c notes: 1. stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. vcc terminals. 3. all terminals except vcc. capacitance (t a = +25 o c, f = 1.0mhz, v in = 0v) pins typ. max. (1) unit c in 46pf c out 79pf note: 1. this parameter is guaranteed but not production tested. pin description pin names i/o description oea , oeb i output enable inputs ina, inb i clock inputs oan, obn o clock outputs mon o unbuffered monitor output
3 qs5805t/at/bt guaranteed low skew cmos clock driver/buffer industrial temperature range dc electrical characteristics over operating range following conditions apply unless otherwise specified: industrial: t a = -40c to +85c, v cc = 5.0v 10% symbol parameter test conditions min. typ. (1) max. unit v ih input high voltage guaranteed logic high for all inputs 2 v v il input low voltage guaranteed logic low for all inputs 0.8 v v ic clamp diode voltage (3) vcc = min., i in = -18ma C0.7 C1.2 v v oh output high voltage vcc = min., i oh = -24ma 2.4 v vcc = min., i oh = -32ma 2 v v ol output low voltage vcc = min., i ol = 64ma 0.55 v i in input leakage current vcc = max., v in = vcc or gnd 1 m a i off input/output power off leakage vcc = 0v, v in or v out = vcc or gnd 1 m a i oz output leakage current vcc = max., v out = vcc or gnd 1 m a i os short circuit current (2,3) vcc = max., v out = gnd C 60 C250 ma d v t input hysteresis v tlh - v thl for all inputs 0.2 v notes: 1. typical values are at v cc = 5.0v, t a = 25c. 2. not more than one output should be used to test this high power condition. duration is less than one second. 3. guaranteed by design but not tested. power supply characteristics symbol parameter test conditions (1) typ. (3) max. unit i cc quiescent power supply current v cc = max., v in = gnd or vcc 0.005 0.5 ma d i cc supply current per input high v cc = max., v in = 3.4v, f i = 0mhz 1 2.5 ma i ccd dynamic power supply current per output (2) v cc = max., v in = gnd or vcc outputs enabled, 50% duty cycle 0.08 0.18 ma/mhz i c total power supply current examples (2,4) v cc = max., oea = oeb = gnd v in = gnd or vcc 4 9.5 ma 50% duty cycle, f i = 10mhz five outputs toggling unused inputs = gnd or vcc v in = gnd or 3.4v 4.5 10.8 v cc = max., oea = oeb = gnd v in = gnd or vcc 2.2 5.5 50% duty cycle, f i = 2.5mhz all outputs toggling v in = gnd or 3.4v 3.2 8 notes: 1. for conditions shown as min. or max., use the appropriate values specified under dc electrical characteristics. 2. guaranteed by design but not tested. c l = 0pf. 3. typical values are for reference only. conditions are v cc = 5.0v, t a = 25c. 4. i c = i cc + ( d i cc )(d h )(n t ) + i ccd (f o )(n o ) where: d h = input duty cycle n t = number of ttl high inputs at d h (one or two) f o = output frequency n o = number of outputs at f o
4 industrial temperature range qs5805t/at/bt guaranteed low skew cmos clock driver/buffer skew characteristics over operating range t a = -40c to +85c, v cc = 5.0v 10% c load = 50pf; r load = 500 w qs5805t qs5805at qs5805bt symbol parameter (1) min. max. min. max. min. max. unit t sk(01) skew between two outputs, same transition, same bank 0.7 0.7 0.7 ns t sk(02) skew between two outputs, same transition, different banks 0.9 0.9 0.9 ns t sk(p) pulse skew; opposite transition skew, same output (t phl - t plh ) 0.7 0.7 0.7 ns t sk(t) part-to-part skew (2) 1.51 1 ns notes: 1. skew parameters are guaranteed across temperature range, but not tested. skew parameters apply to propagation delays only. 2. t sk(t) only applies to devices of the same transition, part type, temperature, power supply voltage, loading, package, and speed grad e. switching characteristics over operating range t a = -40c to +85c, v cc = 5.0v 10% c load = 50pf; r load = 500 w qs52805t qs52805at qs5805bt symbol parameter (1) min. max. min. max. min. max. unit t plh t phl propagation delay (2) 1.5 6.5 1.5 5.8 1.5 5 ns t pzl t pzh output enable time 1.5 8 1.5 8 1.5 7 ns t plz t phz output disable time 1.5 7 1.5 7 1.5 6 ns t r output rise time, 0.8v to 2v (3) 1.5 1.5 1.5 ns t f output fall time, 2v to 0.8v (3) 1.5 1.5 1.5 ns notes: 1. minimums guaranteed but not production tested. 2. the propagation delay other range indicated by min. and max. specifications results from process and environmental variable s. these propagation delays do not imply limit skew. 3. this parameter is guaranteed but not tested.
5 qs5805t/at/bt guaranteed low skew cmos clock driver/buffer industrial temperature range pulse generator 500 w v cc v out v in dut 50 w 50pf 6.0 v parameter tested switch position all others closed open t plz , t pzl control input enable disable 3v 1.5v 0v 3v 0v 1.5v 1.5v output normally low switch closed 0.3v 0.3v input output 1 3v 1.5v 0v output 2 input output 3v 1.5v 0v 1.5v 2.0v 0.8v input part 1 output 3v 1.5v 0v part 2 output input output a t plha 3v 1.5v 0v output b input output t plh t phl 3v 1.5v 0v v oh v ol t sk(p) = t phl - t plh t sk(02) = t plhb - t plha or t phlb - t phla pulse generator for all pulses: f 1.0mhz; t f 2.5ns; t r 2.5ns v oh v ol v oh v ol t phla t sk(02) t sk(02) t plhb t phlb v oh v ol v oh v ol t sk(01) t sk(01) t sk(01) = t plh2 - t plh1 or t phl2 - t phl1 t plh1 t phl1 t plh2 t phl2 v oh v ol v oh v ol t plh t phl t r t f output normally high t pzl t plz t phz t pzh switch open t plh1 t phl1 t sk(t) t sk(t) t plh2 t phl2 t sk(t) = t plh2 - t plh1 or t phl2 - t phl1 v oh v ol v ol v oh 1.5v 1.5v 1.5v 1.5v 1.5v 1.5v 1.5v 500 w propagation delay pulse skew t sk(p) output skew (same bank) t sk(o1) test circuits and waveforms ouput skew (different banks) t sk(o2) enable and disable times part-to-part skew t sk(t)
6 industrial temperature range qs5805t/at/bt guaranteed low skew cmos clock driver/buffer ordering information corporate headquarters for sales: 2975 stender way 800-345-7015 or 408-727-6116 santa clara, ca 95054 fax: 408-492-8674 www.idt.com* *to search for sales office near you, please click the sales button found on our home page or dial the 800# above and press 2. the idt logo, quickswitch, and synchroswitch are registered trademarks of integrated device technology, inc. xxxx device type xx package q so 5805t 5805at 5805bt quarter size small outline package (so20-8) small outline ic (so20-2) guaranteed low skew cmos clock driver/buffer qs
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